'vcix' Dialect The SiFive Vector Coprocessor Interface (VCIX) provides a flexible mechanism
to extend application processors with custom coprocessors and
variable-latency arithmetic units. The interface offers throughput comparable
to that of standard RISC-V vector instructions. To accelerate performance,
system designers may use VCIX as a low-latency, high-throughput interface to
a coprocessor
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Operations ¶ source
vcix.v.iv (vcix::BinaryImmOp) ¶ Binary VCIX operation with an immediate second operand
Binary VCIX operation with an immediate second operand.
Correponds to:
Mnemonic funct6 vm rs2 rs1 funct3 rd Destination Sources sf.vc.v.iv 0010– 0 vs2 simm 011 vd vector vd simm[4:0] vector vs2
Attributes: ¶ Attribute MLIR Type Description opcode::mlir::Attribute 32-bit signless integer attribute or 64-bit signless integer attribute imm::mlir::Attribute 32-bit signless integer attribute or 64-bit signless integer attribute
Operands: ¶ Operand Description vs2LLVM dialect-compatible vector type vl64-bit signless integer or 32-bit signless integer
Results: ¶ Result Description resLLVM dialect-compatible vector type
vcix.v.sv (vcix::BinaryOp) ¶ Binary VCIX operation
Binary VCIX operation with an integer scalar, or floating pointer scalar or
vector second operand.
Correponds to:
Mnemonic funct6 vm rs2 rs1 funct3 rd Destination Sources sf.vc.v.vv 0010– 0 vs2 vs1 000 vd vector vd vector vs1, vector vs sf.vc.v.xv 0010– 0 vs2 xs1 100 vd vector vd scalar xs1, vector vs2 sf.vc.v.fv 0010– 0 vs2 fs1 101 vd vector vd scalar fs1, vector vs2
Attributes: ¶ Attribute MLIR Type Description opcode::mlir::Attribute 32-bit signless integer attribute or 64-bit signless integer attribute
Operands: ¶ Operand Description vs2LLVM dialect-compatible vector type opLLVM dialect-compatible vector type or 64-bit signless integer or 32-bit signless integer or 16-bit float or 32-bit float or 64-bit float vl64-bit signless integer or 32-bit signless integer
Results: ¶ Result Description resLLVM dialect-compatible vector type
MLIR